Adaptive Digital Compensation of Analog Circuit Imperfections for Cascaded Delta-Sigma Analog-to-Digital Converters
نویسنده
چکیده
1. Goal: high resolution and large bandwidth ADCs. 2. ADCs: oversampling, noise shaping, (one-bit quantizer); trade speed for resolution; trade analog-circuit accuracy for digital-circuit complexity. 3. Architecture: cascaded 2-0 delta-sigma (2-0 MASH) ADC; p robust stability and speed; high sensitivity to analog-circuit imperfections. 4. Issues of the MASH ADCs: designing the structure; handling the path mismatch; implementing the high-speed circuitry.
منابع مشابه
Improved adaptive digital compensation for cascaded ΔΣ ADCs
Cascaded delta-sigma (MASH) converters offer a good compromise between high accuracy, robust stability and speed. However, they are very sensitive to analog circuit imperfections. This paper presents an improved adaptive on-line digital compensation of these errors. Behavioral and circuitlevel simulations have confirmed an achievable 13-bit performance and 6-MHz bandwidth for the proposed ADC.
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